1. Field of Invention
The present invention relates to a testing assembly. More particularly, the present invention relates to a testing assembly used for electric test of electric packages.
2. Description of Related Art
Generally, after IC chips are packaged into packages, a device level testing will be performed to the packages to eliminate unqualified ones and to ensure the quality thereof. Moreover, to ensure that a package can work properly after it is installed into a computer system, a system level testing may be performed to the packages. These tests are necessary for packages of advanced or costly IC chips.
The testing assemblies of packages may vary by the package forms of packages. As to quad flat no-lead (QFN) packages, the testing assembly thereof includes a testing board and a testing socket, wherein the testing socket is installed on the testing board. The testing socket includes an insulating body and a plurality of pogo-pins, wherein the pogo-pins pass though the insulating body and the pogo-pins are arranged according to the electrodes of the QFN package to be tested. In addition, part of the surface of the testing board corresponding to the testing socket has a plurality of testing pads, and the bottom ends of the pogo-pins are in touch with the testing pads respectively and elastically.
When a QFN package is installed on the testing socket and a contact surface of the QFN package touches a carrying surface of the insulating body, the top ends of the pogo-pins will be in touch with the electrodes on the contact surface of the QFN package respectively so these pogo-pins are served as electric channels between the electrodes of the QFN package and the testing pads of the testing board respectively. Accordingly, the QFN package may be electrically connected to the testing board through the testing socket so that electric test may be performed to the QFN package.
However, as to the conventional testing socket corresponding to the electric test for QFN packages, along with the increase of electrode density of the QFN package, the space between the pogo-pins of the conventional testing socket will be too narrow as to the size of the pogo-pins, thus capacitive coupling between adjacent pogo-pins will increase, which will further worsen the impedance mismatch and decrease the quality of signal transmission. All of these are very disadvantageous to the testing accuracy of testing assemblies as a whole.